FIFO (first-in first-out) memories have numerous applications in VLSI (very large-scale integration) circuits and electronic systems and are well known in theory and practice of computing. For example, a FIFO memory may act as a buffer between two circuits which operate asynchronously to each other. In this case, input data are simultaneously written into the FIFO memory at one frequency and independently read out of the FIFO memory at a different frequency.
FIFO memories may be implemented and used in software or hardware. Conventionally, a dual port RAM (random access memory) is used when implementing a FIFO memory, which allows read and write operations to be performed independently within the RAM. However, one disadvantage of the dual port RAM is that it is almost twice the size of a single port RAM having the same capacity. In contrast, a single port RAM can perform only one operation (read or write) at a time. Thus, a straightforward use of a single port RAM inside a FIFO memory may lead to an unwanted limitation that only one operation may be performed within the FIFO memory at any given time.
Thus, it would be desirable to provide a FIFO memory with single port memory modules (e.g., single port RAMs, and the like) that may allow simultaneous read and write operations. Such a FIFO memory would occupy a smaller chip area than a FIFO memory using a dual port memory module (e.g., a dual port RAM).